Cisco C8510-SRP - Switch Route Processor Instrukcja Użytkownika Pobierz pdf (Strona 19)

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Table 8 Catalyst 8500 ATM Switching-Speciﬁc Features and Beneﬁts

Feature Comment/Description Beneﬁt

Multiservice Switch and Route Processor

Shared-Memory Fabric • Switch memory shared across all ports Allows for high degree of effective buffering,

multiplying physical buffer space

Low Switch Latency • Latencies of 18 to 25 microseconds typical Supports delay- and jitter-sensitive trafﬁc

Flash Memory • Supported in internal SIMMs and PC Card Allows for upgrades to support larger code sizes

Standards-Based Port Interfaces

Standards Compliance • Per ATM Forum UNI speciﬁcations and all

referenced PHY speciﬁcations therein

Multivendor interoperability

Network Clocking (Stratum 4 Standard)

Stratum 3 via Optional Daughter Available for Catalyst

8540 MSR

• Supports loop timing, slave mode to timing master

port, or local clocking

Allows for all modes of operation, depending upon

type of interface or application; loop timing for

wide-area ports and clock distribution from master

port for synchronous interfaces to support AAL1 or

ATM CES

Automatic Interface Recognition • Uses the ILMI protocol to identify any new

interfaces as UNI or NNI, public or private

Precludes need for manual conﬁguration

Interface LEDs • Two LEDs (RX and TX) per port Visual indication of port operation and status

Connection Management

VC and VP Switching, VP Multiplexing • Supports up to 256 VPCs

• 8 bits VPI, 14 bits VCI

Supports all modes of switch and end-system

operation and allows for large numbers of connections

across high-speed ports

Logical Point-to-Multipoint VCs • Multiple leafs per output port for each

point-to-multipoint, when the port has multiple VPs

Required at the CPE demark when leafs from a

point-to-multipoint connection are destined for

multiple sites tunneled through different VPs across

the public network

VC Merge (frame mode) • Preserves AAL5 cell sequencing when merging input

from two or more connections onto one output

connection

Supports multipoint-to-point connections

network-wide, providing much greater VC utilization,

and thus greater scalability in wide-area networks that

support packet- or frame-based trafﬁc, such as Tag

Switching networks

ATM Signaling and Routing

UNI 3.0, 3.1, and 4.0 Signaling (ITU-T Q.2931, Q.2971) • Fully standards compliant; supports signaling version

interworking

Allows end systems of any UNI version level to signal

for SVCs

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